The present invention relates to a semiconductor integrated circuit device and, more specifically, to a structure of an active area, a shallow trench isolation, and a conductor formed on the active area and the shallow trench isolation via a glue layer.
FIG. 1 is a cross-sectional view showing a prior art semiconductor integrated circuit device.
The device of FIG. 1 includes two adjacent active areas (AA) 104 between which a shallow trench isolation (STI) 103 is interposed. An N+-type semiconductor region 105 is formed in one of the active areas 104, and a P+-type semiconductor region 106 is formed in the other active area 104. An opening 113 is formed in a first interlayer insulation film 112. The shallow trench isolation 103, N+-type semiconductor region 105 and P+-type semiconductor region 106 are exposed to the bottom of the opening 113. A glue layer 114 is formed in the opening 113. The opening 113 is filled with a conductor 115 which is electrically connected to the regions 105 and 106 through the glue layer 114. The conductor 115 connects the regions 105 and 106 above the shallow trench isolation 103.
In the structure of the prior art device shown in FIG. 1, the glue layer 114 is brought into direct contact with both the N+- and P+-type semiconductor regions 105 and 106 in the opening 113. If, therefore, a defect 200 is caused in the active area 104 so as to extend from the region 105 and reach a substrate 101 through a PN junction, a conductor constituting the glue layer 114, such as titanium (Ti), is diffused along the defect 200 by a heating step of a manufacturing process, and a Ti-silicide layer will be formed through the PN junction. As a result, a leak (junction leak) is increased remarkably in the PN junction.
The increase in junction leak increases power consumption and causes malfunction, which lowers the reliability of the device and decreases the manufacturing yield thereof.
A method of manufacturing a semiconductor device according to a first aspect of the inventions described herein includes: forming an element isolation region in a semiconductor substrate isolating an active area in the substrate; causing the active area to overlap the element isolation region; forming a metal layer on the active area; reacting the metal layer to the active area to form an interlayer insulation film on the element isolation region and a reaction layer of the metal layer; forming an opening in the interlayer insulation film, the opening being exposed to the element isolation region and the reaction layer; forming a glue layer in the opening; and forming a conductor electrically connected to the active area via the glue layer.
A method of manufacturing a semiconductor device according to a second aspect of the inventions includes: forming an element isolation region in a silicon semiconductor substrate of a first conductivity type isolating an active area in the semiconductor substrate; forming a semiconductor region of a second conductivity type in the active area; exposing a top surface and a side of the active area; forming silicon layer on the top surface and the side of the active area and overlapping the element isolation region by selective epitaxial growth; forming an interlayer insulation film on the element isolation region and the silicon layer; forming an opening to which the element isolation region, the silicon layer, and a boundary therebetween are exposed; forming a glue layer in the opening; and forming a conductor electrically connected to the semiconductor region through the glue layer.
A method of manufacturing a semiconductor device according to a third aspect of the inventions includes: forming an element isolation region in a semiconductor substrate of a first conductivity type isolating an active area in a silicon semiconductor substrate; forming a semiconductor region of a second conductivity type in the active area; exposing a top surface of the active area; forming, in the element isolation region, a hollow to which a side of the active area is exposed; burying silicon layer in the hollow; forming an interlayer insulation film on the element isolation region and the silicon layer; forming an opening to which the element isolation region, the silicon layer and a boundary there between are exposed; forming a glue layer in the opening; and forming a conductor electrically connected to the semiconductor region through the glue layer.
A method of manufacturing a semiconductor device according to a fourth aspect of the inventions includes: forming an element isolation region in a semiconductor substrate of a first conductivity type isolating an active area in the semiconductor substrate; forming a semiconductor region of a second conductivity type in the active area; causing the active area to overlap the element isolation region; forming a metal layer at least on the active area after the active area is caused to overlap the element isolation region causing the metal layer to react on the active area to form a reaction layer of metal containing the metal layer and a semiconductor containing the active area; removing an unreacted portion of the metal layer to leave the reaction layer on a surface of the semiconductor region of the second conductivity type formed in the active area; forming an interlayer insulation film on the element isolation region and the reaction layer; forming an opening to which the element isolation region, the reaction layer, and a boundary therebetween are exposed; forming a glue layer in the opening; and forming conductor electrically connected to the semiconductor region through the glue layer.